publications
publications by categories in reversed chronological order. generated by jekyll-scholar.
2025
- IEEE FPLAccelerating K-Means: A Vectorized Approach for AI Engines & Neural Processing UnitsIn 2025 35th International Conference on Field-Programmable Logic and Applications (FPL), 2025
- ACM TRETSQUEKUF: an FPGA Union Find Decoder for Quantum Error Correction on the Toric CodeACM Transactions on Reconfigurable Technology and Systems (TRETS), 2025
- IEEE FCCMSoaring with TRILLI: an HW/SW Heterogeneous Accelerator for Multi-Modal Image RegistrationIn 2025 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2025
- ACM TRETSRock the QASBA: Quantum Error Correction Acceleration via the Sparse Blossom Algorithm on FPGAsACM Transactions on Reconfigurable Technology and Systems (TRETS), 2025
- ACM TRETSDFlows: A Flow-based Programming Approach for a Polyglot Design-Space Exploration FrameworkACM Transactions on Reconfigurable Technology and Systems (TRETS), 2025
- IEEE ISCASVOTED – Versal Optimization Toolkit for Education and Heterogeneous Systems DevelopmentIn 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025
- IEEE/ACM CGOCombining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression MatchingIn IEEE/ACM International Symposium on Code Generation and Optimization, 2025
2024
- IEEE ICCDCo-Designing a 3D Transformation Accelerator for Versal-Based Image RegistrationIn IEEE International Conference on Computer Design, 2024
- IEEE ICCDSATL: A Spatial Architecture Rapid Prototyping Framework for Irregular Applications AccelerationIn IEEE International Conference on Computer Design, 2024
- ACM/IEEE DACALVEARE: a Domain-Specific Framework for Regular ExpressionsIn 61st ACM/IEEE Design Automation Conference (DAC ’24), 2024
- IEEE IPDPSW (RAW)An Accurate Union Find Decoder for Quantum Error Correction on the Toric CodeIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2024
- IEEE IPDPSW (RAW)Towards the Acceleration of the Sparse Blossom Algorithm for Quantum Error CorrectionIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2024
- IEEE IPDPSW (RAW)POCA: a PYNQ Offloaded Cryptographic Accelerator on Embedded FPGA-based SystemsIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2024
- IEEE IPDPSWPSyGS Gen A Generator of Domain-Specific Architectures to Accelerate Sparse Linear System ResolutionIn 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2024
- IEEE/ACM CGOOne Automaton To Rule Them All: Beyond Multiple Regular Expressions ExecutionIn IEEE/ACM International Symposium on Code Generation and Optimization, 2024
2023
- IEEE BioCASATHENA: a GPU-based Framework for Biomedical 3D Rigid Image RegistrationIn IEEE Biomedical Circuits and Systems Conference (BioCAS), 2023
- IEEE QCEThe Hitchhiker’s Guide to FPGA-Accelerated Quantum Error CorrectionIn 2023 IEEE International Conference on Quantum Computing and Engineering (QCE), 2023
- IEEE EUROCONOn the Design and Characterization of Set Packing Problem on Quantum AnnealersIn IEEE EUROCON 2023 International Conference on Smart Technologies, 2023
- IEEE EUROCONA Bird’s Eye View on Quantum Computing: Current and Future TrendsIn IEEE EUROCON 2023 International Conference on Smart Technologies, 2023
- IEEE EUROCONCo-designing an FPGA-Accelerated Encryption Library With PYNQ: The Pynqrypt Case StudyIn IEEE EUROCON 2023 International Conference on Smart Technologies, 2023
- IEEE IPDPSW (RAW)Enabling Efficient Regular Expression Matching at the Edge through Domain-Specific ArchitecturesIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2023
- IEEE ISCASYARB: A Methodology to Characterize Regular Expression Matching on Heterogeneous SystemsIn 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023
- ACM FPGASenju: A Framework for the Design of Highly Parallel FPGA-based Iterative Stencil Loop AcceleratorsIn Proceedings of the 2023 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2023
- Elsevier JPDCStarlight: A Kernel Optimizer for GPU ProcessingJournal of Parallel and Distributed Computing, 2023
- ACM TRETSAcross Time and Space: Senju’s Approach for Scaling Iterative Stencil Loop Accelerators on Single and Multiple FPGAsACM Transactions on Reconfigurable Technology and Systems (TRETS), 2023
- IEEE JBHINERONE: the Fast Way to Efficiently Execute Your Deep Learning Algorithm at the EdgeIEEE Journal of Biomedical and Health Informatics (J-BHI), 2023
- ACM TECSHEPHAESTUS: Codesigning and Automating 3D Image Registration on Reconfigurable ArchitecturesACM Transactions on Embedded Computing Systems (TECS), 2023
- SpringerReconfigurable architectures: the shift from general systems to domain specific solutionsIn Emerging Computing: From Devices to Systems. Looking Beyond Moore and Von Neumann, 2023
2022
- IEEE TPDSFaber: a Hardware/Soft-ware Toolchain for Image RegistrationIEEE Transactions on Parallel and Distributed Systems, 2022
- ACM CSURPushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAsACM Computing Surveys (CSUR), 2022
- IEEE TETCAn Energy-Efficient Domain-Specific Architecture for Regular ExpressionsIEEE Transactions on Emerging Topics in Computing, 2022
- IEEE IISWCCharacterizing Molecular Dynamics Simulation on Commodity PlatformsIn 2022 IEEE International Symposium on Workload Characterization (IISWC), 2022
- IEEE IPDPSW (RAW)On How to Push Efficient Medical Semantic Segmentation to the Edge: the SENECA approachIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2022
- IEEE IPDPSW (RAW)Online Learning RTL Synthesis for Automated Design Space ExplorationIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2022
2021
- ACM TECSCICERO: A Domain-Specific Architecture for Efficient Regular Expression MatchingACM Transactions on Embedded Computing Systems (TECS), 2021
- ACM TRETSEnhancing the scalability of multi-fpga stencil computations via highly optimized hdl componentsACM Transactions on Reconfigurable Technology and Systems (TRETS), 2021
- IEEE BioCASExploiting Heterogeneous Architectures for Rigid Image RegistrationIn IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021
- IEEE RTSIOn How FPGAs are Changing the Computer Security Panorama: An Educational SurveyIn IEEE 6th International Forum on Research and Technology for Society and Industry (RTSI), 2021
- IEEE IPDPSW (RAW)Dovado: An Open-Source Design Space Exploration FrameworkIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2021
- ACM FPGAA Framework for Customizable FPGA-based Image Registration AcceleratorsIn ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2021
2019
- ACM TRETSOptimizing bit-serial matrix multiplication for reconfigurable computingACM Transactions on Reconfigurable Technology and Systems (TRETS), 2019
2018
- IEEE IPDPSW (RAW)A parallel, energy efficient hardware architecture for the merAligner on FPGA using Chisel HCLIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2018
- IEEE IPDPSW (RAW)TiReX: Tiled regular expression matching architectureIn IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2018