Davide Conficconi
Dipartimento di Elettronica Informazione e Bioingegneria
NECSTLab, Building 20
Via Giuseppe Ponzio 34/5
Milano 20133, IT
I am an Assistant Professor at Dipartimento Elettronica, Informazione e Bioingegneria of Politecnico di Milano (Italy) and an incoming visiting scholar at the University of Edinburgh.
My research interests fall in the broad spectrum of the digital computer system architecture field where achieving high-performance and energy-efficiency is paramount. Specifically major topics are: (co-)design of domain-specific architectures and systems, architectures or frameworks that span the system stack (from the HDL design to the design automation, from the abstraction layer the compilation framework), reconfigurable architectures, especially FPGAs, heterogeneous systems. I am also started investigating neuromorphic systems and aerospace systems where specilization and efficiency are mandatory. Together with other investigators from Polimi, TUM, and Imperial, we are looking at opportunities in Whisky aging acceleration.
An experiment to better visualize my research can be found here (WIP). Further details of my publications can be found in Google Scholar profile, my publications page, or this self-made pdf list (possibly outdated), or other research profiles in this page.
If you are a motivated student, and curious or already share some of my research interests, feel free to reach out.
news
| Mar 26, 2026 | Paolo Salvatore Galfano and Alessandro Marina defended their Master thesis project. They achieved their Master degree in Computer Science and Engineering at Politecnico di Milano. Congratulations! |
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| Mar 13, 2026 | “Are We Ready to Enable Satellite Autonomy Through on Board Image Registration?” got accepted with shepherding at SIGMETRICS’26! The work was led by Claudio Di Salvo. See you in Ann Arbor! |
| Mar 12, 2026 | Two papers accepted at FCCM’26! “Adaptive AIE–PL Systems for Efficient End-to-End Pyramidal 3D Image Registration” work led by Giuseppe Sorrentino and “ReFHE-NTT: Resource-Driven NTT FPGA Architecture for Fully Homomorphic Encryption” work led by Valentino Guerrini See you in Atlanta! |
| Mar 06, 2026 | “How Secure is a High-Performance RISC-V Core? A Spectre V1 Case Study on XiangShan Open-Source CPU” got conditionally accepted at EuroSec’26! The work was led by Rey Paraula and Roberto Petenzi. See you in Edinburgh! |
| Mar 06, 2026 | “A Power-Centric Methodology to Characterize Edge AI SoC with Limited Telemetry Capabilities” got accepted at RAW’26! The work was led by Giulio Mantovi and Davide Paltrinieri. See you in New Orleans! |
selected publications
- ACM SIGMTERICSAre We Ready to Enable Satellite Autonomy Through on Board Image Registration?In Proceedings of the ACM on Measurement and Analysis of Computing Systems, 2026
- IEEE FCCMAdaptive AIE–PL Systems for Efficient End-to-End Pyramidal 3D Image RegistrationIn 2026 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2026
- IEEE FCCMReFHE-NTT: Resource-Driven NTT FPGA Architecture for Fully Homomorphic EncryptionIn 2026 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2026