Davide Conficconi

Politecnico di Milano

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Dipartimento di Elettronica Informazione e Bioingegneria

NECSTLab, Building 20

Via Giuseppe Ponzio 34/5

Milano 20133, IT

I am an Assistant Professor at Dipartimento Elettronica, Informazione e Bioingegneria of Politecnico di Milano (Italy) and an incoming visiting scholar at the University of Edinburgh.

My research interests fall in the broad spectrum of the system architecture field where achieving high-performance and energy-efficiency is paramount. Specifically major topics are: (co-)design of domain-specific architectures and systems, architectures or frameworks that span the system stack (from the HDL design to the design automation, from the abstraction layer the compilation framework), reconfigurable architectures, especially FPGAs, heterogeneous systems. I am also started investigating neuromorphic systems and aerospace systems where specilization and efficiency are mandatory.

An experiment to better visualize my research can be found here (WIP). Further details of my publications can be found in Google Scholar profile, my publications page, or this self-made pdf list (possibly outdated), or other research profiles in this page.

If you are a motivated student, and curious or already share some of my research interests, feel free to reach out.

news

Feb 02, 2026 “RoPeerTo: A Datacenter-Scale Architecture for Peer-To-Peer DMA between GPUs and FPGA” got accepted with shepparding at EuroSys’26! The work was led by Marco Venere in collaboration with ETH Zurich and AMD. See you in Edinburgh!
Feb 02, 2026 Glad to announce I will be a visiting scholar at the School of Informatics at the University of Edinburgh hosted by Prof. Antonio Barbalace in the Systems Nuts group under the Informatics-Huawei distinguished scholar scheme!
Feb 01, 2026 Claudio Di Salvo starts his PhD with the team :)
Jan 28, 2026 Invited to serve as FPL 2026 Program Committee Submit your papers!
Dec 12, 2025 Giacomo Brunetta, Marco Laurenzi, Alessandro Marina, and Valentino Guerrini defended their Master thesis project. They achieved their Master degree in Computer Science at the University of Illinois of Chicago (a double degree program with Politecnico di Milano). Congratulations!

selected publications

  1. ACM EuroSys
    RoPeerTo: A Datacenter-Scale Architecture for Peer-To-Peer DMA between GPUs and FPGA
    Marco Venere, Giuseppe Sorrentino, Benjamin Ramhorst, Maximilian Jakob Heer, Lucian Petrica, Dario Korolija, Marco Domenico Santambrogio, Davide Conficconi, Gustavo Alonso, and Kenneth O’Brien
    In Proceedings of the Twentyfirst European Conference on Computer Systems, 2026
    DOI
  2. IEEE FCCM
    Soaring with TRILLI: an HW/SW Heterogeneous Accelerator for Multi-Modal Image Registration
    Giuseppe Sorrentino, Paolo S. Galfano, Eleonora D’Arnese, and Davide Conficconi
    In 2025 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2025
    DOI
  3. IEEE/ACM CGO
    Combining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression Matching
    Andrea Somaini, Filippo Carloni, Giovanni Agosta, Marco D Santambrogio, and Davide Conficconi
    In IEEE/ACM International Symposium on Code Generation and Optimization, 2025
    DOI
  4. ACM/IEEE DAC
    ALVEARE: a Domain-Specific Framework for Regular Expressions
    Filippo Carloni, Davide Conficconi, and Marco D Santambrogio
    In 61st ACM/IEEE Design Automation Conference (DAC ’24), 2024
    DOI
  5. IEEE/ACM CGO
    One Automaton To Rule Them All: Beyond Multiple Regular Expressions Execution
    Luisa Cicolini, Filippo Carloni, Marco D Santambrogio, and Davide Conficconi
    In IEEE/ACM International Symposium on Code Generation and Optimization, 2024
    DOI
  6. ACM TECS
    HEPHAESTUS: Codesigning and Automating 3D Image Registration on Reconfigurable Architectures
    Giuseppe Sorrentino, Marco Venere, Davide Conficconi, Eleonora D’Arnese, and Marco D Santambrogio
    ACM Transactions on Embedded Computing Systems (TECS), 2023
    DOI
  7. IEEE TPDS
    Faber: a Hardware/Soft-ware Toolchain for Image Registration
    Eleonora D’Arnese, Davide Conficconi, Emanuele Del Sozzo, Luigi Fusco, Donatella Sciuto, and Marco D Santambrogio
    IEEE Transactions on Parallel and Distributed Systems, 2022
    DOI
  8. ACM CSUR
    Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs
    Emanuele Del Sozzo, Davide Conficconi, Alberto Zeni, Mirko Salaris, Donatella Sciuto, and Marco Domenico Santambrogio
    ACM Computing Surveys (CSUR), 2022
    DOI
  9. ACM TECS
    CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching
    Daniele Parravicini, Davide Conficconi, Emanuele Del Sozzo, Christian Pilato, and Marco D Santambrogio
    ACM Transactions on Embedded Computing Systems (TECS), 2021
    DOI
  10. ACM FPGA
    A Framework for Customizable FPGA-based Image Registration Accelerators
    Davide Conficconi, Eleonora D’Arnese, Emanuele Del Sozzo, Donatella Sciuto, and Marco D Santambrogio
    In ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2021
    DOI