Davide Conficconi
Dipartimento di Elettronica Informazione e Bioingegneria
NECSTLab, Building 20
Via Giuseppe Ponzio 34/5
Milano 20133, IT
I am an Assistant Professor at Dipartimento Elettronica, Informazione e Bioingegneria of Politecnico di Milano (Italy).
My research interests fall in the broad spectrum of the system architecture field where achieving high-performance and energy-efficiency is paramount. Specifically major topics are: (co-)design of domain-specific architectures and systems, architectures or frameworks that span the system stack (from the HDL design to the design automation, from the abstraction layer the compilation framework), reconfigurable architectures, especially FPGAs, heterogeneous systems. I am also started investigating neuromorphic systems and aerospace systems where specilization and efficiency are mandatory.
An experiment to better visualize my research can be found here (WIP). Further details of my publications can be found in Google Scholar profile, my publications page, or this self-made pdf list (possibly outdated), or other research profiles in this page.
If you are a motivated student, and curious or already share some of my research interests, feel free to reach out.
news
| Dec 12, 2025 | Giacomo Brunetta, Marco Laurenzi, Alessandro Marina, and Valentino Guerrini defended their Master thesis project. They achieved their Master degree in Computer Science at the University of Illinois of Chicago (a double degree program with Politecnico di Milano). Congratulations! |
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| Dec 04, 2025 | Invited to serve as FCCM 2026 and FPL 2026 Artifact Evaluation Co-Chair Submit your artifacts, reproducible science needed! |
| Nov 26, 2025 | Invited to serve in FCCM 2026 Program Committee Submit your papers! |
| Nov 11, 2025 | “Exploring Resource-Efficient NTT FPGA Accelerator for Fully Homomorphic Encryption” got accepted as extended abstract at DATE2026! The work was led by Valentino Guerrini See you in Verona! |
| Oct 23, 2025 | Simone Mannarino and Claudio Di Salvo defended their Master Thesis Project achieving their Master degree in Computer Science and Engineering. Congratulations! |
selected publications
- IEEE FCCMSoaring with TRILLI: an HW/SW Heterogeneous Accelerator for Multi-Modal Image RegistrationIn 2025 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2025
- IEEE/ACM CGOCombining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression MatchingIn IEEE/ACM International Symposium on Code Generation and Optimization, 2025
- ACM/IEEE DACALVEARE: a Domain-Specific Framework for Regular ExpressionsIn 61st ACM/IEEE Design Automation Conference (DAC ’24), 2024
- IEEE/ACM CGOOne Automaton To Rule Them All: Beyond Multiple Regular Expressions ExecutionIn IEEE/ACM International Symposium on Code Generation and Optimization, 2024
- ACM TECSHEPHAESTUS: Codesigning and Automating 3D Image Registration on Reconfigurable ArchitecturesACM Transactions on Embedded Computing Systems (TECS), 2023
- IEEE TPDSFaber: a Hardware/Soft-ware Toolchain for Image RegistrationIEEE Transactions on Parallel and Distributed Systems, 2022
- ACM CSURPushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAsACM Computing Surveys (CSUR), 2022
- ACM TECSCICERO: A Domain-Specific Architecture for Efficient Regular Expression MatchingACM Transactions on Embedded Computing Systems (TECS), 2021
- ACM FPGAA Framework for Customizable FPGA-based Image Registration AcceleratorsIn ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2021