Davide Conficconi

Dipartimenti di Elettronica Informazione e Bioingegneria
NECSTLab, Building 20
Via Giuseppe Ponzio 34/5
Milano 20133, IT
I am an Assistant Professor (RTDa) at Dipartimento Elettronica, Informazione e Bioingegneria of Politecnico di Milano (Italy).
My research interests fall in the broad spectrum of system architecture field where achieving high-performance and energy-efficiency is paramount. Specifically major topics: (co-)design of domain-specific systems, architectures or frameworks that span the system stack (from the HDL design to the design automation, from the abstraction layer the compilation framework), reconfigurable architectures, especially FPGAs, heterogeneous systems. I am also started investigating neuromorphic systems and aerospace systems where specilization and efficiency are mandatory.
An experiment to better visualize my research can be found here (WIP). Further details of my publications can be found in Google Scholar profile, my publications page, or this self-made pdf list (possibly outdated), or other research profiles in this page.
If you are a motivated student, and curious or already share some of my research interests, feel free to reach out.
news
Mar 08, 2025 | “Rock the QASBA: Quantum Error Correction Acceleration via the Sparse Blossom Algorithm on FPGAs” accepted for publication at ACM Transactions on Reconfigurable Technology and Systems TRETS Work led by Marco Venere |
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Mar 03, 2025 | Andrea Somaini presented the work “Combining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression Matching” at the IEEE/ACM International Symposium on Code Generation and Optimization in Las Vegas. |
Feb 17, 2025 | I have been selected for the European Talent Academy fellowship 2025. I will be representing Polimi in this research and networking program. Looking forward to visit Imperial and TUM! |
Feb 05, 2025 | “DFlows: a Flow-based Programming Approach for a Polyglot Design-Space Exploration Framework” accepted for publication at ACM Transactions on Reconfigurable Technology and Systems TRETS Work led by Francesco Peverelli |
Jan 20, 2025 | “VOTED – Versal Optimization Toolkit for Education and Heterogeneous Systems Development” accepted for publication at 2025 IEEE International Symposium on Circuits and Systems (ISCAS). Work led by Giuseppe Sorrentino See you in London! |
selected publications
- HEPHAESTUS: Codesigning and Automating 3D Image Registration on Reconfigurable ArchitecturesACM Transactions on Embedded Computing Systems (TECS), 2023
- Faber: a Hardware/Soft-ware Toolchain for Image RegistrationIEEE Transactions on Parallel and Distributed Systems, 2022
- Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAsACM Computing Surveys (CSUR), 2022
- CICERO: A Domain-Specific Architecture for Efficient Regular Expression MatchingACM Transactions on Embedded Computing Systems (TECS), 2021
- Combining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression MatchingIn IEEE/ACM International Symposium on Code Generation and Optimization, 2025
- ALVEARE: a Domain-Specific Framework for Regular ExpressionsIn 61st ACM/IEEE Design Automation Conference (DAC ’24), 2024
- One Automaton To Rule Them All: Beyond Multiple Regular Expressions ExecutionIn IEEE/ACM International Symposium on Code Generation and Optimization, 2024
- A Framework for Customizable FPGA-based Image Registration AcceleratorsIn ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2021